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Espressif Systems /ESP32-S2 /RTC_CNTL /RESET_STATE

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Interpret as RESET_STATE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESET_CAUSE_PROCPU 0RESET_CAUSE_APPCPU 0 (APPCPU_STAT_VECTOR_SEL)APPCPU_STAT_VECTOR_SEL 0 (PROCPU_STAT_VECTOR_SEL)PROCPU_STAT_VECTOR_SEL

Description

Indicates the CPU reset source. For more information about the reset cause, please refer to Table \ref{table:resetreasons} in Chapter \ref{module:ResetandClock} \textit{ ameref{module:ResetandClock}}.

Fields

RESET_CAUSE_PROCPU

Stores the CPU reset cause.
RESET_CAUSE_APPCPU

reset cause of APP CPU
APPCPU_STAT_VECTOR_SEL

APP CPU state vector sel
PROCPU_STAT_VECTOR_SEL

Selects the CPU state vector.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data